The present application relates to non-volatile memory, and more particularly to a resistive random access memory (ReRAM or RRAM) device made by a single process which enables the in-situ deposition of a bottom electrode layer (i.e., a metal layer), a resistive switching element (i.e., at least one metal oxide layer), and a top electrode layer (i.e., a metal nitride layer and/or a metal layer) with compositional control.
Many modern day electronic devices contain electronic memory. Electronic memory may be volatile memory or non-volatile memory. Non-volatile memory retains its stored data in the absence of power, whereas volatile memory loses its stored data when power is lost. Resistive random access memory (ReRAM or RRAM) is one promising candidate for the next generation of non-volatile memory due to its simple structure and its compatibility with complementary metal-oxide-semiconductor (CMOS) logic fabrication processes.
For metal/metal oxide ReRAMs, oxygen ion migration under an electric field leads to the formation/annihilation of a metal-rich conducting filament, providing resistive switching between a high-resistance state and a low resistance state. For example, W-rich conducting filaments can be formed in a WO3-based ReRAM device.
ReRAM devices benefit greater from the presence of layers with uniform composition. In the case of a WO3-based ReRAM device, poor composition can lead to mixed oxide phases which degrade device performance. However, a particular metal-oxide phase may enable the desired resistance characteristics from a given ReRAM device architecture. There is a need for cost reduction in ReRAM device fabrication by reducing both process complexity and the number of required processing steps.